D.F IMP
Credit [4]
👉conversion {MIMP}
👉binary to octal
👉octal to binary
👉binary to hexadecimal
👉hexa.. To binary
👉1's & 2's complement
👉Binary Arithmetic
👉BCD Addition
👉Excess-3 Code
👉Gray Code
👉logic gates
👉Boolean law {MIMP}
👉Boolean properties {MIMP)}
👉Demorgan's Theotems {MIMP} & examples
👉NAND AS universal {MIMP}
👉nor as universal {MIMP}
👉characteristic of Digital ICs
✔propagation Delay
✔Power Dissipation
✔Noise Margin
✔Fan-in/out
✔speed power Product
👉2-input TTL NAND Gates
👉Totem-Pole outpu
👉comparison between Totem-pole and Open -Collector Outputs
👉TTL VS CMOS
👉K-map ...SOP(min)
👉implementation of SOP expression examples
👉NAND-NAND Implementation examples
👉Multiplexers (4:1/8:1)
👉implementation of combinational logic using MUX EXAMPLES
👉octal to binary Encoder
👉half/full Adder
👉Digital Comparator
👉code converters examples
Module:-3
👉combinational vs sequential
👉SR Latch
👉SR/D/JK Flip-flop
👉Master-slave JK flip-flop
👉Excitation tables
👉Shift left registers
👉PISO
👉4-bit Asynchronous/Synchronous
👉Binary Weighted Resistor D/A Converter
👉DUAL Slop ADC
👉Successive Approximation ADC
👉SRAM VS DRAM
👉PLA
👉FPGA

Module :-1
👉conversion {MIMP}
👉binary to octal
👉octal to binary
👉binary to hexadecimal
👉hexa.. To binary
👉1's & 2's complement
👉Binary Arithmetic
👉BCD Addition
👉Excess-3 Code
👉Gray Code
👉logic gates
👉Boolean law {MIMP}
👉Boolean properties {MIMP)}
👉Demorgan's Theotems {MIMP} & examples
👉NAND AS universal {MIMP}
👉nor as universal {MIMP}
👉characteristic of Digital ICs
✔propagation Delay
✔Power Dissipation
✔Noise Margin
✔Fan-in/out
✔speed power Product
👉2-input TTL NAND Gates
👉Totem-Pole outpu
👉comparison between Totem-pole and Open -Collector Outputs
👉TTL VS CMOS
Module 2:-
👉K-map ...SOP(min)
👉implementation of SOP expression examples
👉NAND-NAND Implementation examples
👉Multiplexers (4:1/8:1)
👉implementation of combinational logic using MUX EXAMPLES
👉octal to binary Encoder
👉half/full Adder
👉Digital Comparator
👉code converters examples
Module:-3
👉combinational vs sequential
👉SR Latch
👉SR/D/JK Flip-flop
👉Master-slave JK flip-flop
👉Excitation tables
👉Shift left registers
👉PISO
👉4-bit Asynchronous/Synchronous
Module:-4
👉Binary Weighted Resistor D/A Converter
👉DUAL Slop ADC
👉Successive Approximation ADC
Module:- 5
👉SRAM VS DRAM
👉PLA
👉FPGA
DF ka book ka pdf ?
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DeleteAdd the google drive link plz. I'm having exam of DF
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